GATE CSE 2017 SET-1
Q21.
A computer network uses polynomials over GF(2) for error checking with 8 bits as information bits and uses x^{3}+x+1 as the generator polynomial to generate the check bits. In this network, the message 01011011 is transmitted asQ22.
A multithreaded program P executes with x number of threads and uses y number of locks for ensuring mutual exclusion while operating on shared memory locations. All locks in the program are non-reentrant, i.e., if a thread holds a lock l, then it cannot re-acquire lock l without releasing it. If a thread is unable to acquire a lock, it blocks until the lock becomes available. The minimum value of x and the minimum value of y together for which execution of P can result in a deadlock are:Q23.
Consider the Karnaugh map given below, where x represents "don't care" and blank represents 0. Assume for all inputs (a, b, c, d) the respective complements (\bar{a},\bar{b},\bar{c},\bar{d}) are also available. The above logic is implemented 2-input NOR gates only. The minimum number of gates required is ____________.Q24.
Let T be a tree with 10 vertices. The sum of the degrees of all the vertices in T is _________.Q25.
The output of executing the following C program is ________. # include int total (int v) { while (v) { static int count + = v & 1; v>> = 1; } return count; } void main ( ) { static int x = 0; int i = 5; for (; i> 0; i--) { x=x + total (i) ; } printf ("%d\n", x) ; }Q26.
Consider the C functions foo and bar given below: int foo (int val ) { int x = 0; while (val > 0) { x = x + foo(val--); } return val ; } int bar (int val ) { int x = 0; while (val > 0) { x = x + bar(val-1);} return val ; } Invocations of foo(3) and bar(3) will result in:Q27.
Consider the following two functions. The output printed when fun1(5) is called isQ28.
Consider the following table: Match the algorithms to the design paradigms they are based on.Q29.
When two 8-bit numbers A_{7}....A_{0} and B_{7}....B_{0} in 2's complement representation (with A_{0} and B_{0} as the least significant bits ) are added using a ripple-carry Combinational Circuit, the sum bits obtained are S_{7}....S_{0} and the carry bits are C_{7}....C_{0}. An overflow is said to have occurred ifQ30.
Consider the expression ( a-1)* (((b + c) / 3) + d)) . Let X be the minimum number of registers required by an optimal code generation (without any register spill) algorithm for a load/store architecture in which (i) only loads and store instructions can have memory operands and (ii) arithmetic instructions can have only register or immediate operands. The value of X is _________.